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linear-solver-suite

large sparse linear systems: Krylov, multigrid, direct

PETSc, hypre, Trilinos

SystemTechniques · 6Primitives · 20 linear-solver-suite Halo exchangedistributed · medium: Each rank stores its block plus a border copy of its neighbours' edge cells, refreshed by small messages every step; communication scales with block surface, not volume.›Graph partitioninggraphs · medium: Split a graph into k balanced parts with few edges between them; multilevel coarsen-partition-refine (METIS, KaHIP) for quality, streaming heuristics (LDG, Fennel) for one-pass scale.›Fill-reducing orderingnumerics · medium: Permute a sparse symmetric matrix before Cholesky/LU so the factor has few new nonzeros; minimum degree, nested dissection and RCM trade quality, speed and parallelism.›Gmresnumerics · medium: GMRES with restarts: Arnoldi, Givens rotations, for nonsymmetric sparse systemsIncomplete factorization preconditi…numerics · medium: Sparse approximate LU or Cholesky factors (ILU, IC) that precondition Krylov solvers: fewer iterations than Jacobi, less memory than a direct solve.›Sparse direct solvernumerics · medium: Solve sparse Ax = b exactly by reordering, symbolic analysis, numeric LLᵀ/LU and triangular solves; fill-in, not flops per entry, decides the cost.›Sparse matrices (CSR)numerics · low: Compressed sparse row stores only nonzeros as row pointers, column indices and values; SpMV streams them once, so it is memory-bandwidth bound.›LU and Cholesky factorizationnumerics · low: Factor A = PLU (any square matrix, partial pivoting) or A = LLᵀ (SPD) once in O(n³), then solve each right-hand side in O(n²).›Gpu memory coalescing bankinghardware-os · low: Coalesced global loads, shared memory bank conflicts, L2 and HBM bandwidth on GPUsNuma aware allocationhardware-os · low: Allocate memory and pin threads on the local NUMA node; first-touch and interleave policiesRoofline modelhardware-os · low: Bound a kernel's speed by min(peak FLOP/s, arithmetic intensity × memory bandwidth) to know whether to optimize compute or data movement.›SIMD programminghardware-os · low: Process 4-16 lanes per instruction with AVX2, AVX-512 or NEON via Rust std::arch, with runtime dispatch and a portable fallback.›CUDA and GPU languageslanguages · low: Programming GPUs: thousands of lockstep threads, bound by memory bandwidth; libraries first, Triton for fused kernels, CUDA C++ for peak speed.›Collective communicationml-training · low: The family of group exchanges (broadcast, reduce, all-gather, reduce-scatter, all-to-all) and the latency-plus-bytes cost model that picks ring, tree or direct algorithms by message size and topology.›Tiled matrix multiplicationml-training · low: Block GEMM into tiles held in shared memory and registers, so each byte loaded from DRAM feeds many FMAs; the core of fast GEMM.›Conjugate gradientnumerics · low: Krylov iteration for symmetric positive definite Ax = b using one matrix-vector product and two dot products per step; converges in about √κ iterations.›Floating-point errornumerics · low: How IEEE 754 rounding error accumulates and how to contain it: compensated (Kahan/Neumaier) and pairwise summation, error-free transformations with FMA, ULP comparisons.›Low precision number formatsnumerics · low: Bf16, fp16, fp8 (E4M3, E5M2), MX block formats and int4: ranges, rounding, scalingMultigridnumerics · low: Smooths high-frequency error on the fine grid and solves the smooth remainder on coarser grids; O(n) elliptic solves at any resolution.›Reproducible reductionnumerics · low: Order-independent floating-point sums (fixed order, Kahan, binned) for bit-for-bit reproducibilityEager rendezvous protocoldistributed · low: MPI point-to-point: eager sends for small messages, rendezvous handshake for large onesRdmanetworking · low: RDMA verbs over InfiniBand/RoCE: queue pairs, memory registration, one-sided ops+ 4 more primitives

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