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lbm-solver

lattice Boltzmann flow solver

Palabos, waLBerla

SystemTechniques · 6Primitives · 36 lbm-solver Batch checkpoint restartdistributed · medium: Large batch jobs (end-of-day, settlement, payroll runs) that checkpoint and restart idempotentlyHalo exchangedistributed · medium: Each rank stores its block plus a border copy of its neighbours' edge cells, refreshed by small messages every step; communication scales with block surface, not volume.›Parallel file system stripingdistributed · medium: Striping files across object storage targets (Lustre, GPFS); collective I/O and metadata serversLevel set methodsnumerics · medium: Implicit surfaces as signed distance fields: advection, reinitialization, fast marchingChunked array storagestorage · medium: Cut an N-dimensional array into a regular grid of independently compressed blocks, so a slice read touches only the overlapping blocks and writers to different blocks run in parallel.›Flux limiters upwindingnumerics · medium: Upwind schemes, TVD flux limiters, MUSCL and Riemann solvers for shock-capturing advectionQuadtree octreegeometry · low: Adaptive spatial subdivision trees for queries and level of detail; loose and linear variantsVoxel ray traversal ddagraphics · low: Amanatides-Woo grid DDA to step rays through voxels for picking, shadows and collisionCPU caches and the memory hierarchyhardware-os · low: Sizes, line widths and latencies of L1/L2/L3/DRAM on modern x86 and Apple M-series, and the data-layout rules that follow from them.›Structure of arrays and hot/cold sp…hardware-os · low: Store each field in its own array and keep rarely used fields apart, so a loop reads only the bytes it needs and the compiler can vectorize it.›Gpu memory coalescing bankinghardware-os · low: Coalesced global loads, shared memory bank conflicts, L2 and HBM bandwidth on GPUsRoofline modelhardware-os · low: Bound a kernel's speed by min(peak FLOP/s, arithmetic intensity × memory bandwidth) to know whether to optimize compute or data movement.›SIMD programminghardware-os · low: Process 4-16 lanes per instruction with AVX2, AVX-512 or NEON via Rust std::arch, with runtime dispatch and a portable fallback.›CUDA and GPU languageslanguages · low: Programming GPUs: thousands of lockstep threads, bound by memory bandwidth; libraries first, Triton for fused kernels, CUDA C++ for peak speed.›Collective communicationml-training · low: The family of group exchanges (broadcast, reduce, all-gather, reduce-scatter, all-to-all) and the latency-plus-bytes cost model that picks ring, tree or direct algorithms by message size and topology.›Floating-point errornumerics · low: How IEEE 754 rounding error accumulates and how to contain it: compensated (Kahan/Neumaier) and pairwise summation, error-free transformations with FMA, ULP comparisons.›Low precision number formatsnumerics · low: Bf16, fp16, fp8 (E4M3, E5M2), MX block formats and int4: ranges, rounding, scalingPeriodic boundary conditionsphysics · low: Minimum image convention and wrapping for simulations in periodic boxesIdempotency keysfinance · low: Client-chosen unique key per logical operation, stored with a request fingerprint and the final response, so retries replay the first result instead of acting twice.›Write-ahead logstorage · low: Append each change to a checksummed sequential log and fsync it before touching data pages; the basis of crash durability in nearly every database.›Cron schedulingsystems · low: Cron expression parsing and next-fire-time computation, with catch-up and time-zone rulesEager rendezvous protocoldistributed · low: MPI point-to-point: eager sends for small messages, rendezvous handshake for large ones+ 20 more primitives

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