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rtl-verification

RTL simulation, hardware emulation and formal verification

Synopsys VCS/ZeBu, Cadence Xcelium/Palladium, Verilator, JasperGold

SystemTechniques · 20Primitives · 42 rtl-verification Work-stealing dequeconcurrency · medium: Per-worker deque: the owner pushes and pops at the bottom without contention, idle workers steal from the top; the core of Rayon, Tokio and Go.›Deterministic simulation testingdistributed · medium: Run the whole system in one thread under a seeded scheduler with simulated network, disk and clock, so every failure replays from its seed.›Model checking and formal proofembedded · medium: Exhaustively explore a model's reachable states (or prove its invariants with a solver or proof assistant) to find rule violations with a shortest counterexample trace.›Graph partitioninggraphs · medium: Split a graph into k balanced parts with few edges between them; multilevel coarsen-partition-refine (METIS, KaHIP) for quality, streaming heuristics (LDG, Fennel) for one-pass scale.›Cycle based compiled simulationhardware-os · medium: Levelized two-state compiled RTL simulation evaluating logic once per clock cycle (Verilator style)Event driven logic simulationhardware-os · medium: RTL and gate simulation with event wheels, delta cycles and 4-state logicFpga dataflow pipelineshardware-os · medium: Fully pipelined fixed-latency FPGA logic: initiation interval, HLS, BRAM and DSP budgetingBinary decision diagramsoptimization · low: A reduced ordered BDD stores a Boolean function as a shared DAG that is unique per variable order, so equivalence is one integer compare and counting is one pass.›Code coverage instrumentationcompilers · low: Insert counters into compiled code to record which blocks, edges or lines ran; a spanning tree of the control-flow graph cuts the counters needed.›Delta encodingcompression · low: Store differences between consecutive values instead of the values, turning sorted IDs, timestamps and counters into small numbers that pack into few bits.›Waveform database compressioncompression · low: Value-change dump and compressed waveform storage with delta and dictionary coding for fast viewingAnd inverter graphshardware-os · low: AIGs: logic as 2-input AND nodes with complemented edges, structural hashing, rewriting and balancingConstrained random stimulushardware-os · low: Constraint-solved random test generation with seeds and distributions for hardware verificationFunctional coverage collectionhardware-os · low: Covergroups, bins and cross coverage sampled in simulation and merged into coverage databasesEpoch-based reclamationconcurrency · low: Threads announce a global epoch while touching shared lock-free data; garbage retired in epoch e is freed once the epoch reaches e + 2.›Memory orderingconcurrency · low: What Relaxed, Acquire, Release and SeqCst atomics actually guarantee, what they cost on x86 and ARM, and which one each pattern needs.›Cooperative schedulingconcurrency · low: Green threads/coroutines yielding at await points on a user-space schedulerRecord replaydistributed · low: Record every nondeterministic input (time, randomness, I/O, model and tool outputs, per-tick player input) and re-execute deterministically for debugging, replays and state rebuildPRNGs (PCG, xoshiro)numerics · low: Small, fast, statistically strong non-cryptographic generators: PCG32 and xoshiro256**, with seeding, parallel streams and unbiased ranges.›Swiss tabledata-structures · low: Open-addressing hash table that filters 8-16 slots at once with 1-byte hash tags and SIMD, giving fast lookups at 87.5 % load.›BFS and DFSgraphs · low: The two basic graph traversals; BFS gives hop distances and levels, DFS gives discovery/finish order for cycles, components and topological order.›d-ary heapdata-structures · low: Array heap with d children per node (d = 4 typical): half the binary heap's depth, siblings in one cache line, faster priority queues.›Sparse matrices (CSR)numerics · low: Compressed sparse row stores only nonzeros as row pointers, column indices and values; SpMV streams them once, so it is memory-bandwidth bound.›+ 13 more techniques+ 26 more primitives

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